Image intensifying devices use solid state sensors, such as CMOS or CCD devices. Image intensifier devices amplify low intensity light or convert non-visible light into regularly viewable images. Image intensifier devices are particularly useful for providing images from infra-red light and have many industrial and military applications. For example, image intensifier tubes may be used for enhancing the night vision of aviators, for photographing astronomical events and for providing night vision to sufferers of night blindness.
There are three types of image intensifying devices: image intensifier tubes for cameras, solid state CMOS (complementary metal oxide semiconductor) and CCD (charge coupled device) sensors, and hybrid EBCCD/CMOS (electronic bombarded CCD or CMOS) sensors.
Referring to FIG. 1, there is shown a schematic diagram of an image intensifier tube, generally designated as 10. As shown, light energy 14 reflected from object 12 impinges upon photocathode 16. Photocathode 16 receives the incident energy on input surface 16a and outputs the energy, as emitted electrons, on output surface 16b. The output electrons, designated as 20, from photocathode 16, are provided as an input to an electron gain device, such as MCP 18. The MCP includes input surface 18a and output surface 18b. As electrons bombard input surface 18a, secondary electrons are generated within micro-channels 22 of MCP 18. The MCP generates several hundred electrons for each electron entering input surface 18a. 
Although not shown, it will be understood that MCP 18 is subjected to a difference in voltage potential between input surface 18a and output surface 18b, typically over a thousand volts. This potential difference enables electron multiplication. Electrons 24, outputted from MCP 18, impinge upon solid state electron sensing device 26. Electron sensing device 26 may be a CMOS imager, for example, and includes input surface 26a and output surface 26b, as shown in FIG. 1. Electron sensing device 26 may be fabricated as an integrated circuit, using CMOS processes. Such devices are generally described in U.S. application Ser. No. 09/973,907, which is incorporated herein by reference in its entirety.
In general, the CMOS imager employs electron sensing elements. Input surface 26a includes an active receive area sensitive to the received light from MCP 18. The output signals of the electron sensing elements may be provided, at output surface 26b, as analog or digital signals whose magnitudes are proportional to the amount of light received by the electron sensing elements. CMOS imagers use less power and have lower fabrication cost compared to imagers made by CCD processes.
The output of CMOS imager 26 produces an intensified image signal that may be sent, by way of a bus, to image display device 28. The output of CMOS imager 26 may be, alternatively, stored in a memory device (not shown).
To facilitate the multiplication of electrons between the input of the is image intensifier tube, at input surface 16a, and the output of the image intensifier tube, at output surface 26b, a vacuum housing is provided. As shown, photocathode 16, MCP 18 (or other electron gain device) and CMOS imager 26 (or other electron sensing device) are packaged in vacuum housing 29. In addition to providing a vacuum housing, input surface 26a of the CMOS imager and output surface 18b of the MCP are required to physically be very closely spaced from each other.
Such close spacing presents a problem, because a conventional silicon die of a CMOS imager, for example, includes wires looping above the input surface of the imager for outputting the intensified image signal. As these wires flare out from the silicon die and loop above the input surface, before they are connected to bond pads on a ceramic carrier holding the silicon die, it has not previously been possible to closely space the input surface of the imager to the output surface of the MCP. What is required, therefore, is a method of making electrical connections between an electron sensing silicon die (for example a CMOS imager silicon die) and bond pads of its ceramic carrier, without having the wires loop above the input surface of the silicon die.
As an example, conventional silicon die for computer and digital imaging applications do not have active components that need to be in close vertical proximity to other components. Conventional silicon die, therefore, do not require low profile electrical connections. A conventional silicon die is shown in FIGS. 2a and 2b. As shown, chip 30 includes silicon die 32 attached to ceramic carrier 34. The silicon die includes an array of terminal pads 36 for providing input/output (I/O) signals. Hundreds of terminal pads 36 are typically disposed around the peripheral circumference of silicon die 32. Also shown in FIGS. 2a and 2b are an array of pads 38 disposed on ceramic carrier 34. Leads or wires 40 are attached by ultrasonic bonding of wires between I/O pads 36 and I/O pads 38, thereby making electrical contact between them. Extending from the bottom of ceramic carrier 34 are a plurality of pins 42, as shown in FIG. 2b, which are connected through via-holes (not shown) to the array of bond pads 38. In this manner, electrical contacts are made between bond pads 36 on silicon die 32 and the input/output of the chip, at the plurality of pins 42.
In a typical conventional configuration, wires 40 loop above the planar top surface of silicon die 32 and then descend down toward ceramic carrier 34, as shown in FIG. 2b. These wire loops above silicon die 32, in the case of a conventional CMOS imager (for example), prevent a tight vertical placement between the top active surface area of silicon die 32 and the output surface area of electron gain device 18. As best shown in FIG. 2c, output surface 18b of electron gain device 18 is placed in close vertical proximity to the input surface area of silicon die 32. However, because of the looping of wires 40, it is not possible to reduce the vertical space between output surface 18b and the top surface of silicon die 32. The lowest wire bond profile is limited to the wire bond height plus a vertical clearance to ensure the wires do not contact the silicon surface and become shorted. The most likely place to electrically short is at a corner of the silicon die.
The present invention addresses this shortcoming and provides an electron sensing device (for example CMOS imager) and methods of making the electron sensing device with electrical connections between the silicon die and its ceramic carrier with a very low wire bonding profile, thereby allowing for a very tight interface and clearance between the electron sensing device and the electron gain device (for example MCP).